The present invention relates, in general, to balun transformers and, in particular, to the construction of balun transformers fabricated as part of an integrated circuit.
It is common practice to use differential circuits in highly integrated radio frequency integrated circuits to improve signal-to-noise ratio. Two signals of opposite phase, developed from an input signal supplied from an antenna, are combined by the differential circuit, so that the two signals are added to produce the desired signal, while undesired noise is cancelled.
Frequently, in radio frequency integrated circuits that include such differential circuits, unbalanced components are connected to balanced components. Unbalanced components usually are large and expensive filters, power amplifiers, etc. Making such components balanced, though possible, results in large and costly components.
Power matching requires the use of balanced impedance transformers. Passive versus active balun transformers are used primarily because they do not require additional current. However, passive balun transformers are physically large.
Further, high power differential circuits require low loss balun transformer combiners to be power efficient. The two main loss mechanisms in an on-chip balun transformer are conductor loss and substrate loss. In low impedance systems and at lower radio frequencies, conductor loss dominates. At higher frequencies and, in particular, in high impedance systems, where the balun transformer port impedance is on the order of the substrate impedance, substrate loss dominates.
As the loadline impedance is high in a differential circuit to reduce current consumption, high substrate loss is a problem. This problem can be solved by providing a means to reduce substrate loss.
It is an objective of the present invention to provide a new and improved balun transformer.
It is another objective of the present invention to provide a new and improved balun transformer fabricated as part of an integrated circuit.
It is a further objective of the present invention to provide a balun transformer fabricated as part of an integrated circuit having reduced substrate loss.
A balun transformer, constructed in accordance with the present invention, includes a first layer having a substantially flat first conductor portion of a first primary loop conductor and a substantially flat first conductor portion of a second primary loop conductor connected in series with the substantially flat first conductor portion of the first primary loop conductor. This balun transformer also includes a second layer spaced from the first layer. The second layer has a substantially flat second conductor portion of the first primary loop conductor having a width less than the width of the substantially flat first conductor portion of the first primary loop conductor and a substantially flat second conductor portion of the second primary loop conductor having a width less than the width of the substantially flat first conductor portion of the second primary loop conductor. The second layer also has a substantially flat first secondary loop conductor interlaced with the substantially flat second conductor portion of the first primary loop conductor and a substantially flat second secondary conductor loop conductor interlaced with the substantially flat second conductor portion of the second primary loop conductor.